Performance Analysis of CPU-GPU Cluster Architectures
American Journal of Networks and Communications
Volume 4, Issue 3, June 2015, Pages: 67-74
Received: May 17, 2015; Accepted: May 29, 2015; Published: Jun. 11, 2015
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Author
Ho Khanh Lam, Performance Analysis of CPU-GPU Cluster Architectures
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Abstract
High performance computing (HPC) encompasses advanced computation over parallel processing, enabling faster execution of highly compute intensive tasks such as climate research, molecular modeling, physical simulations, cryptanalysis, geophysical modeling, automotive and aerospace design, financial modeling, data mining and more. High performance simulations require the most efficient compute platforms. The execution time of a given simulation depends upon many factors, such as the number of CPU/GPU cores and their utilization factor and the interconnect performance, efficiency, and scalability. CPU and GPU clusters are one of the most progressive branches in a field of parallel computing and data processing nowadays. GPUs have become increasingly common in supercomputing, serving as accelerators or "co-processors" in every node CPU-GPU to help CPUs get work done faster. In this paper I use the Multiclass Closed Product-Form Queueing Network (MCPFQN) and Mean Value Analysis (MVA) to analyze effects of the CPU-GPU cluster interconnect on the performance of computer systems.
Keywords
CPU-GPU Clusters, Performance, Multiclass Product Form Queueing Network
To cite this article
Ho Khanh Lam, Performance Analysis of CPU-GPU Cluster Architectures, American Journal of Networks and Communications. Vol. 4, No. 3, 2015, pp. 67-74. doi: 10.11648/j.ajnc.20150403.18
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