American Journal of Nano Research and Applications

| Peer-Reviewed |

Lanthanum Fluoride Charge Trapping Layer with Silicon Nanocrystals for Nonvolatile Memory Device Application

Received: 05 January 2014    Accepted:     Published: 20 February 2014
Views:       Downloads:

Share This Article

Abstract

Silicon nanocrystals (Si-NCs) embedded in a Lanthanum Fluoride (LaF3) insulating layer were fabricated as a charge trapping layer by a simple Chemical Bath Deposition (CBD) technique. The X-Ray diffraction of the deposited layer shows a polycrystalline LaF3 deposition on silicon. The charge storage behavior of Si-NCs embedded in the LaF3 layer have been investigated in metal-insulator-semiconductor (MIS) structures by electrical characterization, where various interface traps and defects were introduced by thermal annealing treatment. The flat-band voltage shift of capacitance-voltage (C–V) and conductance-voltage (G–V) curves of Si: NC-MIS devices were found to exhibit charge trapping. The current-voltage (I–V) measurement also demonstrate that traps have strong influence on the charge storage behavior, in which the traps and defects at the internal/surface of silicon nanocrystals and the interface states at the LaF3 /Si substrate play different roles, respectively. The flat-band voltage (VFB) shift was about 700 mV, which is agreed well enough to capture charge inside the nanoparticle for nonvolatile memory (NVM) device applications. Thickness-dependent flat-band voltage (VFB) shifts in the MIS structure which can be used as a low-voltage nonvolatile memory.

DOI 10.11648/j.nano.20140201.12
Published in American Journal of Nano Research and Applications (Volume 2, Issue 1, January 2014)
Page(s) 8-12
Creative Commons

This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.

Copyright

Copyright © The Author(s), 2024. Published by Science Publishing Group

Keywords

Si Nanocrystal, MIS Devices, Nonvolatile Memory

References
[1] L. Guo, E. Leobandung and S. Y. Chou: Science 275, 649(1997).
[2] I. Kim, S. Han, K. Han, J. Lee and H. Shin: Jpn. J. Appl. Phys. 40, 447(2001).
[3] V.Y. Aaron, and J. P. Leburton, IEEE Potentials 21, 35 (2002).
[4] S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E. F. Crabbe, and K. Chan, Appl. Phys. Lett. 68, 1377 (1996).
[5] H. I. Hanafi, S. Tiwari, and I. Khan, IEEE Trans. Electron. Dev. 43, 1553 (1996).
[6] Y. C. King, T. J. King, and C. Hu, IEEE Trans. Electron Dev. 48, 696 (2001).
[7] C. Y. Ng, T. P. Chen, L. Ding, and S. Fung, IEEE Electron Dev. Lett. 27, 231 (2006).
[8] E. Kapetanakis, P. Normand, D. Tsoukalas, K. Beltsios, J. Stoemenos, S. Zhang, and J. van den Berg, Appl. Phys. Lett, 77, 3450 (2000).
[9] S. Tiwari, F. Rana, K. Chan, L. Shi, and H. Hanafi, Appl. Phys. Lett. 69, 1232 (1996).
[10] Choi S.-H and Elliman R.G, "Reversible charging effects in SiO2 films containing Si nanocrystals", Appl. Phys. Lett, Vol. 75, No. 7, pp. 968-970 (1999).
[11] Y. Shi, K. Saito, H. Ishikuro, and T. Hiramoto, "Effects of traps on charge storage characteristics in metal-oxidesemiconductor memory structures based on silicon nanocrystals", J. Appl. Phys, Vol. 84, No. 4, pp. 2358-2360 (1998).
[12] M. Saitoh, E. Nagata, and T. Hiramoto, "Large memory window and long charge-retention time in ultranarrow-channel silicon floating-dot memory", Appl. Phys. Lett, Vol. 82, No. 11, pp. 1787-1789 (2003).
[13] Chang-Hee Cho, Baek-Hyun Kim, Tae-Wook Kim, Seong-Ju Park, Nae-Man Park and Gun-Yong Sung, "Effect of hydrogen passivation on charge storage in silicon quantum dots embedded in silicon nitride film", Appl. Phys. Lett, Vol. 86, No. 14, pp. 143107- 1431079, 2005.
[14] S.R.A. Ahmed, S. S Mou, A.B.M. Ismail, "Investigation on Lanthanum Fluoride insulating layer embedding silicon nanocrystals for metal-insulator-semiconductor .(MIS) devices", Proceedings of Argentine School of Micro-Nanoelectronics Technology and Applications (EAMTA) 2011, pp.1-5.
[15] A. A. Mortuza, M. H. Rahman, S. S. Mou, M. J. Islam, A. B. M. Ismail, Current Applied Physics 12 (2012) 565.
Author Information
  • Department of Electronic and Telecommunication Engineering, Pabna University of Science and Technology, Pabna 6600, Bangladesh

  • Department of Applied Physics and Electronic Engineering, Rajshahi University, Rajshahi 6202, Bangladesh

Cite This Article
  • APA Style

    Sheikh Rashel Al Ahmed, Abu Bakar Md. Ismail. (2014). Lanthanum Fluoride Charge Trapping Layer with Silicon Nanocrystals for Nonvolatile Memory Device Application. American Journal of Nano Research and Applications, 2(1), 8-12. https://doi.org/10.11648/j.nano.20140201.12

    Copy | Download

    ACS Style

    Sheikh Rashel Al Ahmed; Abu Bakar Md. Ismail. Lanthanum Fluoride Charge Trapping Layer with Silicon Nanocrystals for Nonvolatile Memory Device Application. Am. J. Nano Res. Appl. 2014, 2(1), 8-12. doi: 10.11648/j.nano.20140201.12

    Copy | Download

    AMA Style

    Sheikh Rashel Al Ahmed, Abu Bakar Md. Ismail. Lanthanum Fluoride Charge Trapping Layer with Silicon Nanocrystals for Nonvolatile Memory Device Application. Am J Nano Res Appl. 2014;2(1):8-12. doi: 10.11648/j.nano.20140201.12

    Copy | Download

  • @article{10.11648/j.nano.20140201.12,
      author = {Sheikh Rashel Al Ahmed and Abu Bakar Md. Ismail},
      title = {Lanthanum Fluoride Charge Trapping Layer with Silicon Nanocrystals for Nonvolatile Memory Device Application},
      journal = {American Journal of Nano Research and Applications},
      volume = {2},
      number = {1},
      pages = {8-12},
      doi = {10.11648/j.nano.20140201.12},
      url = {https://doi.org/10.11648/j.nano.20140201.12},
      eprint = {https://download.sciencepg.com/pdf/10.11648.j.nano.20140201.12},
      abstract = {Silicon nanocrystals (Si-NCs) embedded in a Lanthanum Fluoride (LaF3) insulating layer were fabricated as a charge trapping layer by a simple Chemical Bath Deposition (CBD) technique. The X-Ray diffraction of the deposited layer shows a polycrystalline LaF3 deposition on silicon. The charge storage behavior of Si-NCs embedded in the LaF3 layer have been investigated in metal-insulator-semiconductor (MIS) structures by electrical characterization, where various interface traps and defects were introduced by thermal annealing treatment. The flat-band voltage shift of capacitance-voltage (C–V) and conductance-voltage (G–V) curves of Si: NC-MIS devices were found to exhibit charge trapping. The current-voltage (I–V) measurement also demonstrate that traps have strong influence on the charge storage behavior, in which the traps and defects at the internal/surface of silicon nanocrystals and the interface states at the LaF3 /Si substrate play different roles, respectively. The flat-band voltage (VFB) shift was about 700 mV, which is agreed well enough to capture charge inside the nanoparticle for nonvolatile memory (NVM) device applications. Thickness-dependent flat-band voltage (VFB) shifts in the MIS structure which can be used as a low-voltage nonvolatile memory.},
     year = {2014}
    }
    

    Copy | Download

  • TY  - JOUR
    T1  - Lanthanum Fluoride Charge Trapping Layer with Silicon Nanocrystals for Nonvolatile Memory Device Application
    AU  - Sheikh Rashel Al Ahmed
    AU  - Abu Bakar Md. Ismail
    Y1  - 2014/02/20
    PY  - 2014
    N1  - https://doi.org/10.11648/j.nano.20140201.12
    DO  - 10.11648/j.nano.20140201.12
    T2  - American Journal of Nano Research and Applications
    JF  - American Journal of Nano Research and Applications
    JO  - American Journal of Nano Research and Applications
    SP  - 8
    EP  - 12
    PB  - Science Publishing Group
    SN  - 2575-3738
    UR  - https://doi.org/10.11648/j.nano.20140201.12
    AB  - Silicon nanocrystals (Si-NCs) embedded in a Lanthanum Fluoride (LaF3) insulating layer were fabricated as a charge trapping layer by a simple Chemical Bath Deposition (CBD) technique. The X-Ray diffraction of the deposited layer shows a polycrystalline LaF3 deposition on silicon. The charge storage behavior of Si-NCs embedded in the LaF3 layer have been investigated in metal-insulator-semiconductor (MIS) structures by electrical characterization, where various interface traps and defects were introduced by thermal annealing treatment. The flat-band voltage shift of capacitance-voltage (C–V) and conductance-voltage (G–V) curves of Si: NC-MIS devices were found to exhibit charge trapping. The current-voltage (I–V) measurement also demonstrate that traps have strong influence on the charge storage behavior, in which the traps and defects at the internal/surface of silicon nanocrystals and the interface states at the LaF3 /Si substrate play different roles, respectively. The flat-band voltage (VFB) shift was about 700 mV, which is agreed well enough to capture charge inside the nanoparticle for nonvolatile memory (NVM) device applications. Thickness-dependent flat-band voltage (VFB) shifts in the MIS structure which can be used as a low-voltage nonvolatile memory.
    VL  - 2
    IS  - 1
    ER  - 

    Copy | Download

  • Sections