Optoelectronic Module with Integrated Transceiver and Mux-Demux for Optical Interconnect Applications
American Journal of Optics and Photonics
Volume 7, Issue 2, June 2019, Pages: 28-32
Received: Jun. 21, 2019;
Accepted: Jul. 12, 2019;
Published: Jul. 24, 2019
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Nga Thi Hang Nguyen, Electrical Engineering Department, Korea Advanced Institute of Science and Technology (KAIST), Deajeon, South Korea
Ikechi Augustine Ukaegbu, Electrical and Computer Engineering Department, Nazarbayev University (NU), Nur-Sultan, Kazakhstan
Jamshid Sangirov, Electrical Engineering Department, Korea Advanced Institute of Science and Technology (KAIST), Deajeon, South Korea
Hyo-Hoon Park, Electrical Engineering Department, Korea Advanced Institute of Science and Technology (KAIST), Deajeon, South Korea
The design, development and improvtableement in electronic devices and components have led to the further miniaturization of the system devices and their interconnecting interfaces. Hence, reducing the size of the transmitter (Tx) chips, receiver (Rx) chips and associated components play an important role in designing a reduced/small sized optoelectronic modules for optical interconnect applications. Some of the associated components include multiplexer, demultiplexer, clock and data recovery circuits (CDR), etc. Therefore, in this paper we present an optoelectronic module with integrated transceiver (Tx-Rx) and multiplexer-demultiplexer (mux-demux) with the aim of reducing the total area occupied by the chips. The topology is based on sharing common blocks between Tx and Rx as well as Mux and Demux for saving chip area, power consumption and board area. Based on this topology, a design of 2-channel Tx/Mux and Rx/Demux is realized in a 0.18 μm CMOS technology. The measurement results show clear output eye diagrams at 2.5 Gbps with the voltage swing of 375 mVpp from the Rx/Demux. The combined solution would save the chip area and power consumption of 10% and 23%, respectively, compared to discrete circuits implementations. Using this topology, a high efficient bidirectional optical link could be implemented in modern computer and other green IT applications.
Nga Thi Hang Nguyen,
Ikechi Augustine Ukaegbu,
Optoelectronic Module with Integrated Transceiver and Mux-Demux for Optical Interconnect Applications, American Journal of Optics and Photonics.
Vol. 7, No. 2,
2019, pp. 28-32.
M. Forbes, "Optically interconnected electronic chips: a tutorial and review of the technology," Electronics & Communication Engineering Journal, vol. 13, no. 5, pp. 221–232, Oct. 2001.
H. S. Cho, S. Kang, M. H. Cho, B. S. Rho, H.-H. Park, K. U. Shin, S.-W. Ha, B.-H. Rhee, D.-S. Kim, S. T. Jung, T. Kim, “On-board optical interconnection of 2.5 Gb/s x 12 channels data using fiber-embedded PCB,” Proc. of IEEE/ICACT2004, Phoenix Park, Korea, pp. 286-290.
W. S Oh, K. Park, J. C. Choi, C. J. Kim, S. I. Lee and J. K. Moon, “Design of a 12 channel 120 Gb/s Optical Receiver Array in 0.18 μm CMOS Technology’, Electronic Design, Test and Applications (DELTA 2008), 4th IEEE International Symposium 23-25 Jan. 2008, pp. 71-74
S.-K. Kang, T.-W. Lee, S. H. Hwang, M. H. Cho, H.-H. Park, “Demonstration of bidirectional optical link on optical PCB using a driver-receiver combined CMOS transceiver,” Proc. of 56th Electron. Comp. and Technol. pp. 1578-1582, 2006.
I. A. Ukaegbu, M. Rakib-Uddin, J. Sangirov, N. T. H. Nguyen, T.-W. Lee, M.-H. Cho, H.-H. Park “Design of Full-duplex and Multifunction Bidirectional CMOS Transceiver for Optical Interconnect Applications” Optical and Quantum Electronics, vol. 49, no. 7, pp. 243, July, 2017.
J. Sangirov, I. A. Ukaegbu, G. Sangirov, T.-W. Lee, H.-H. Park, “Power-aware transceiver design for half-duplex bidirectional chip-to-chip optical interconnects,” Journal of Semiconductors, vol. 34, no. 12, pp. 125001, December, 2013.
T.-H. Ngo, N. T. H. Nguyen, I. A. Ukaegbu, T.-W. Lee, H.-H. Park “Bidirectional CMOS Transceiver with Automatic Mode Control for Chip-to-chip Optical Interconnects,” IEEE Photonics Technology Letters, vol. 21, no. 20, pp. 1241-1243, 2009.
N. T. H. Nguyen, I. A. Ukaegbu, J. Sangirov, M.-H. Cho, T.-W. Lee, H.-H. Park, “Biwavelength transceiver module for parallel simultaneous bidirectional optical interconnections,” Optical Engineering Letters, vol. 52, no. 12, pp. 120502-120502, December, 2013.
J. Sangirov, G.-C. Joo, J.-S. Choi, D.-H. Kim, B.-S. Yoo, I. A. Ukaegbu, N. T. H. Nga, J.-H. Kim, T.-W. Lee, M. H. Cho, H.-H. Park, “40 Gb/s optical subassembly module for a multi-channel bidirectional optical link”, Optics Express, vol. 22, no.2, pp. 1768-1783, January, 2014.
N. T. H. Nguyen, J. Sangirov, G.-C. Joo, B.-S. Yoo, I. A. Ukaegbu, T.-W. Lee, M.-H. Cho, H.-H. Park “10 Gbps/ch Full-Duplex Optical Link Using a Single-fiber Channel for Signal Transmission” IEEE Photonics Technology Letters, vol. 26, no. 6, pp. 609-612, January, 2014.
J.-C. Chien, L.-H. Lu, “A 15-Gb/s 2:1 multiplexer in 0.18-µm CMOS,” IEEE Microwave and Wireless Components Letters, vol. 16, no. 10, October 2006.
Y. Luo, G. Chen, K. Zhou, “60 Gb/s low jitter 4:1 Mux and 1:4 Demux,” IEEE Midwest Symposium on Circuits and Systems, pp. 590-593, September 2008.
T. Sekiguchi, S. Amakawa, N. Ishihara, K. Masu, “Inductorless 8.9 mW 25 Gb/s 1:4 Demux and 4 mW 13 Gb/s 4:1 Mux in 90 nm CMOS,” Journal of Semiconductor Technology and Science, vol. 10, no. 3, Sept. 2010.
G. Rubiya, S. Vyshnavi, “ Transformer-coupled (TC) technique for the 2:1 Mux and the 1:2 Demux toserialize-and-deserialize (Serdes) high speed data sequence, “ International Journal of Innovative Research in Science, Engineering and Technology, vol. 6, no. 9, Sept. 2017.
M. Meghelli, A. V. Rylyakov, L. Shan, “50-gbit/s InP HEMT 4: 1 multiplexer/1: 4 demultiplexer chip set with a multiphase clock architecture,” IEEE Solid-State Circuits, vol. 37, no. 12, Dec. 2002.