Performance Analysis of CPU-GPU Cluster Architectures

Ho Khanh Lam

doi:doi:10.11648/j.ajnc.20150403.18

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Performance Analysis of CPU-GPU Cluster Architectures

Ho Khanh Lam

Published in American Journal of Networks and Communications (Volume 4, Issue 3)

Received: 17 May 2015 Accepted: 29 May 2015 Published: 11 June 2015

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Abstract

High performance computing (HPC) encompasses advanced computation over parallel processing, enabling faster execution of highly compute intensive tasks such as climate research, molecular modeling, physical simulations, cryptanalysis, geophysical modeling, automotive and aerospace design, financial modeling, data mining and more. High performance simulations require the most efficient compute platforms. The execution time of a given simulation depends upon many factors, such as the number of CPU/GPU cores and their utilization factor and the interconnect performance, efficiency, and scalability. CPU and GPU clusters are one of the most progressive branches in a field of parallel computing and data processing nowadays. GPUs have become increasingly common in supercomputing, serving as accelerators or "co-processors" in every node CPU-GPU to help CPUs get work done faster. In this paper I use the Multiclass Closed Product-Form Queueing Network (MCPFQN) and Mean Value Analysis (MVA) to analyze effects of the CPU-GPU cluster interconnect on the performance of computer systems.

Published in	American Journal of Networks and Communications (Volume 4, Issue 3)
DOI	10.11648/j.ajnc.20150403.18
Page(s)	67-74
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2024. Published by Science Publishing Group

Keywords

CPU-GPU Clusters, Performance, Multiclass Product Form Queueing Network

References

[1]	Gunter Bolch, Stefan Greiner, Hermann de Meer, Kishor S.Trivedi: Queueing Networks and Markov Chains; A John Wiley & sons, Inc., Publication.
[2]	Peng Wang, NVIDIA. Fundamental Optimizations in CUDA, GPU technology conference.
[3]	Bryan Schauer. “Multicore Processors-A Necessity”, 9/2008.
[4]	John Mellor-Crummey, Department of Computer Science Rice University: Caching for Chip Multiprocessor, 8/2009.
[5]	Sarah Bird, …University of Texas at Austin, IBM Austin: Performance Characterization of SPEC CPU Benchmarks on Intel’s Core Microarchitecture based processor. 2006.
[6]	R.Ubal, J.Sahuquillo,..:Multi2Sim. A Simulation Framework to Evaluate Multicore-Multithreaded Processors, 2006.
[7]	W.M.Zuberek. Performance eqivalence in the simulation of Multiprocessor systems, 2002.
[8]	Scott.T.Lentenegger, Mary K.Vernon. A mean-Value performance Analysis of a New Multiprocessor Architecture, 12/1988.
[9]	Angel Vassilev Nikolov, National University of Lesotho, 180, Roma, May,2009. Model of a shared Memory Multiprocessor.
[10]	Susmit Biswas, Diana Franklin,,,2008. Multi-Execution. Multicore Caching for Data- Similar Executions.
[11]	Intel Multicore microprocessor technology. http://www.Intel.ccom/.
[12]	Rafael H. Saavedra-Barrera, David E.Culler. An analytical solution for a markov chain modelling multithreaded execution.
[13]	Michael R.Marty, University of Wisconsin-madison, 2008. Cache coherence techniques for multicore processors.
[14]	Richard Mcdougall and James Laudon. Multi-core microprocessors are here.
[15]	Avinatan Hassidim, 16/09/2009. Cache replacement Policies for Multicore processors.

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APA Style

Ho Khanh Lam. (2015). Performance Analysis of CPU-GPU Cluster Architectures. American Journal of Networks and Communications, 4(3), 67-74. https://doi.org/10.11648/j.ajnc.20150403.18

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ACS Style

Ho Khanh Lam. Performance Analysis of CPU-GPU Cluster Architectures. Am. J. Netw. Commun. 2015, 4(3), 67-74. doi: 10.11648/j.ajnc.20150403.18

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AMA Style

Ho Khanh Lam. Performance Analysis of CPU-GPU Cluster Architectures. Am J Netw Commun. 2015;4(3):67-74. doi: 10.11648/j.ajnc.20150403.18

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@article{10.11648/j.ajnc.20150403.18,
  author = {Ho Khanh Lam},
  title = {Performance Analysis of CPU-GPU Cluster Architectures},
  journal = {American Journal of Networks and Communications},
  volume = {4},
  number = {3},
  pages = {67-74},
  doi = {10.11648/j.ajnc.20150403.18},
  url = {https://doi.org/10.11648/j.ajnc.20150403.18},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.ajnc.20150403.18},
  abstract = {High performance computing (HPC) encompasses advanced computation over parallel processing, enabling faster execution of highly compute intensive tasks such as climate research, molecular modeling, physical simulations, cryptanalysis, geophysical modeling, automotive and aerospace design, financial modeling, data mining and more. High performance simulations require the most efficient compute platforms. The execution time of a given simulation depends upon many factors, such as the number of CPU/GPU cores and their utilization factor and the interconnect performance, efficiency, and scalability. CPU and GPU clusters are one of the most progressive branches in a field of parallel computing and data processing nowadays. GPUs have become increasingly common in supercomputing, serving as accelerators or "co-processors" in every node CPU-GPU to help CPUs get work done faster. In this paper I use the Multiclass Closed Product-Form Queueing Network (MCPFQN) and Mean Value Analysis (MVA) to analyze effects of the CPU-GPU cluster interconnect on the performance of computer systems.},
 year = {2015}
}

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TY  - JOUR
T1  - Performance Analysis of CPU-GPU Cluster Architectures
AU  - Ho Khanh Lam
Y1  - 2015/06/11
PY  - 2015
N1  - https://doi.org/10.11648/j.ajnc.20150403.18
DO  - 10.11648/j.ajnc.20150403.18
T2  - American Journal of Networks and Communications
JF  - American Journal of Networks and Communications
JO  - American Journal of Networks and Communications
SP  - 67
EP  - 74
PB  - Science Publishing Group
SN  - 2326-8964
UR  - https://doi.org/10.11648/j.ajnc.20150403.18
AB  - High performance computing (HPC) encompasses advanced computation over parallel processing, enabling faster execution of highly compute intensive tasks such as climate research, molecular modeling, physical simulations, cryptanalysis, geophysical modeling, automotive and aerospace design, financial modeling, data mining and more. High performance simulations require the most efficient compute platforms. The execution time of a given simulation depends upon many factors, such as the number of CPU/GPU cores and their utilization factor and the interconnect performance, efficiency, and scalability. CPU and GPU clusters are one of the most progressive branches in a field of parallel computing and data processing nowadays. GPUs have become increasingly common in supercomputing, serving as accelerators or "co-processors" in every node CPU-GPU to help CPUs get work done faster. In this paper I use the Multiclass Closed Product-Form Queueing Network (MCPFQN) and Mean Value Analysis (MVA) to analyze effects of the CPU-GPU cluster interconnect on the performance of computer systems.
VL  - 4
IS  - 3
ER  -

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Ho Khanh Lam

Performance Analysis of CPU-GPU Cluster Architectures

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APA Style

Ho Khanh Lam. (2015). Performance Analysis of CPU-GPU Cluster Architectures. American Journal of Networks and Communications, 4(3), 67-74. https://doi.org/10.11648/j.ajnc.20150403.18

Copy | Download

ACS Style

Ho Khanh Lam. Performance Analysis of CPU-GPU Cluster Architectures. Am. J. Netw. Commun. 2015, 4(3), 67-74. doi: 10.11648/j.ajnc.20150403.18

Copy | Download

AMA Style

Ho Khanh Lam. Performance Analysis of CPU-GPU Cluster Architectures. Am J Netw Commun. 2015;4(3):67-74. doi: 10.11648/j.ajnc.20150403.18

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@article{10.11648/j.ajnc.20150403.18,
  author = {Ho Khanh Lam},
  title = {Performance Analysis of CPU-GPU Cluster Architectures},
  journal = {American Journal of Networks and Communications},
  volume = {4},
  number = {3},
  pages = {67-74},
  doi = {10.11648/j.ajnc.20150403.18},
  url = {https://doi.org/10.11648/j.ajnc.20150403.18},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.ajnc.20150403.18},
  abstract = {High performance computing (HPC) encompasses advanced computation over parallel processing, enabling faster execution of highly compute intensive tasks such as climate research, molecular modeling, physical simulations, cryptanalysis, geophysical modeling, automotive and aerospace design, financial modeling, data mining and more. High performance simulations require the most efficient compute platforms. The execution time of a given simulation depends upon many factors, such as the number of CPU/GPU cores and their utilization factor and the interconnect performance, efficiency, and scalability. CPU and GPU clusters are one of the most progressive branches in a field of parallel computing and data processing nowadays. GPUs have become increasingly common in supercomputing, serving as accelerators or "co-processors" in every node CPU-GPU to help CPUs get work done faster. In this paper I use the Multiclass Closed Product-Form Queueing Network (MCPFQN) and Mean Value Analysis (MVA) to analyze effects of the CPU-GPU cluster interconnect on the performance of computer systems.},
 year = {2015}
}

Copy | Download

TY  - JOUR
T1  - Performance Analysis of CPU-GPU Cluster Architectures
AU  - Ho Khanh Lam
Y1  - 2015/06/11
PY  - 2015
N1  - https://doi.org/10.11648/j.ajnc.20150403.18
DO  - 10.11648/j.ajnc.20150403.18
T2  - American Journal of Networks and Communications
JF  - American Journal of Networks and Communications
JO  - American Journal of Networks and Communications
SP  - 67
EP  - 74
PB  - Science Publishing Group
SN  - 2326-8964
UR  - https://doi.org/10.11648/j.ajnc.20150403.18
AB  - High performance computing (HPC) encompasses advanced computation over parallel processing, enabling faster execution of highly compute intensive tasks such as climate research, molecular modeling, physical simulations, cryptanalysis, geophysical modeling, automotive and aerospace design, financial modeling, data mining and more. High performance simulations require the most efficient compute platforms. The execution time of a given simulation depends upon many factors, such as the number of CPU/GPU cores and their utilization factor and the interconnect performance, efficiency, and scalability. CPU and GPU clusters are one of the most progressive branches in a field of parallel computing and data processing nowadays. GPUs have become increasingly common in supercomputing, serving as accelerators or "co-processors" in every node CPU-GPU to help CPUs get work done faster. In this paper I use the Multiclass Closed Product-Form Queueing Network (MCPFQN) and Mean Value Analysis (MVA) to analyze effects of the CPU-GPU cluster interconnect on the performance of computer systems.
VL  - 4
IS  - 3
ER  -

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