Journal of Electrical and Electronic Engineering

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New-age Supercomputers: Hi-Speed Networks and Information Security

Received: 18 August 2019    Accepted: 21 September 2019    Published: 09 October 2019
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Abstract

The author describes computing strategic tasks that are used for ensuring defense and national security, the most important scientific, technical, biomedical and sociology tasks. Most typically, these are capability-based tasks. Supercomputers for their solution are respectively called Technical Capability, i.e. machines of extreme technical capabilities. Machines of this segment are also called High End Computers (HEC), and in our terminology - strategic supercomputers (SCs). Moving to the engineering level, author says that for tasks with good spatio-temporal work with memory, cache memory and schemes for automatically pre-loading data into the cache memory can be effectively used. This can significantly reduce the average memory access time of several hundred processor cycles to fractions of a processor cycle. Such tasks are usually called computational or cache-friendly (cach-friendly) - CF tasks. On tasks with poor spatio-temporal work with memory, the cache memory is useless, so each memory access is hundreds of processor cycles, the processor is idle because of this, and therefore the real performance is in units or even a fraction of a percent of the peak. Such tasks are historically called tasks with intensive irregular work with memory – Data intensive tasks (DIS-tasks). The given examples of spatially-temporal work with task memory and real characteristics of equipment operation in such different modes are given in order to illustrate that in practice different types of supercomputers are needed, for example, for CF- and DIS-tasks.

DOI 10.11648/j.jeee.20190703.12
Published in Journal of Electrical and Electronic Engineering (Volume 7, Issue 3, June 2019)

This article belongs to the Special Issue Science Innovation

Page(s) 82-86
Creative Commons

This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.

Copyright

Copyright © The Author(s), 2024. Published by Science Publishing Group

Keywords

Virtualization, Information Security, Supercomputers, Security Descriptor

References
[1] J. D. Howard, T. Longstaff. A Common Language for Computer Security Incidents, SANDIA Report 2008-120 p.
[2] Computer Network Security and Privacy Protection, Home Land Security Report, Feb. 19, 2010, 20 р.
[3] Defending Computer Networks against Attack, S & TR, Cyber Security, Feb. 2011, 17 p.
[4] K. Scanfoe, K. Masone, T. Grance. Computer Security Incident Handling Guide, Recommendations of the NIST, June 2011, 50 p.
[5] A. Sharma, J. Barlow, R. Iyer. Analysis of security Data from a Large Computing Organisation, University of Urbana Champaign, March 2011, 14 p.
[6] A. Sharma A. Sharma, J. Barlow. Analysis of Credential Stealing Attacks in an Open Networked Environment, University of Urbana Champaign, April 2011, 16 p.
[7] Trader T. STARnet Alliance Seeks Revolution in Chip Design. HPCWire, January 23, 2013.
[8] Filippov T. V. et al. 20 GHz operation of an asynchronous wave-pipelined RSFQ arithmetic-logic unit. Physics Procedia 36, 2012, pp. 59-65.
[9] Herr A. Rapid Single Flux Quantum Logic. Northrop Grumman. March 2012. 23 slides.
[10] Herr A. Y. et al. An 8-bit carry look-ahead adder with 150ps latency and sub-microwatt power dissipation at 10GHz. arXiv: 1212.2994v1 [quant-ph] Dec 2012. 6 pp.
[11] Molyakov, А. S. New Multilevel Architecture of Secured Supercomputers / A. S. Molyakov // Current Trends in Computer Sciences & Applications 1 (3) – 2019. – PP. 57-59. – ISSN: 2643-6744 – https://lupinepublishers.com/computer-science-journal/special-issue/CTCSA.MS.ID.000112.pdf. – DOI: 10.32474/CTCSA.2019.01.000112.
[12] Molyakov, A. S. Technological Methods Analysis in the Field of Exaflops Supercomputers Development Approaching / A. S. Molyakov, L. K. Eisymont // Global Journal of Computer Science and Technology: Information & Technology. – 2017. – № 1 (17). – РР. 37-44.
[13] Molyakov, A. S. A Prototype Computer with Non-von Neumann Architecture Based on Strategic Domestic J7 Microprocessor / A. S. Molyakov // Automatic Control and Computer Sciences. – 2016. – № 50 (8). – РР. 682-686.
[14] Molyakov, A. S. Token Scanning as a New Scientific Approach in the Creation of Protected Systems: A New Generation OS MICROTEK / A. S. Molyakov // Automatic Control and Computer Sciences. – 2016. – № 50 (8). – РР. 687-692.
[15] Molyakov, A. S. Model of hidden IT security threats in the cloud computing environment / A. S. Molyakov, V. S. Zaborovsky, A. A. Lukashin // Automatic Control and Computer Sciences. – 2015. – № 49 (8). – РР. 741-744.
Author Information
  • Institute of Information Technologies and Cybersecurity, Russian State University for the Humanities, Moscow, Russia

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  • APA Style

    Andrey Molyakov. (2019). New-age Supercomputers: Hi-Speed Networks and Information Security. Journal of Electrical and Electronic Engineering, 7(3), 82-86. https://doi.org/10.11648/j.jeee.20190703.12

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    ACS Style

    Andrey Molyakov. New-age Supercomputers: Hi-Speed Networks and Information Security. J. Electr. Electron. Eng. 2019, 7(3), 82-86. doi: 10.11648/j.jeee.20190703.12

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    AMA Style

    Andrey Molyakov. New-age Supercomputers: Hi-Speed Networks and Information Security. J Electr Electron Eng. 2019;7(3):82-86. doi: 10.11648/j.jeee.20190703.12

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  • @article{10.11648/j.jeee.20190703.12,
      author = {Andrey Molyakov},
      title = {New-age Supercomputers: Hi-Speed Networks and Information Security},
      journal = {Journal of Electrical and Electronic Engineering},
      volume = {7},
      number = {3},
      pages = {82-86},
      doi = {10.11648/j.jeee.20190703.12},
      url = {https://doi.org/10.11648/j.jeee.20190703.12},
      eprint = {https://download.sciencepg.com/pdf/10.11648.j.jeee.20190703.12},
      abstract = {The author describes computing strategic tasks that are used for ensuring defense and national security, the most important scientific, technical, biomedical and sociology tasks. Most typically, these are capability-based tasks. Supercomputers for their solution are respectively called Technical Capability, i.e. machines of extreme technical capabilities. Machines of this segment are also called High End Computers (HEC), and in our terminology - strategic supercomputers (SCs). Moving to the engineering level, author says that for tasks with good spatio-temporal work with memory, cache memory and schemes for automatically pre-loading data into the cache memory can be effectively used. This can significantly reduce the average memory access time of several hundred processor cycles to fractions of a processor cycle. Such tasks are usually called computational or cache-friendly (cach-friendly) - CF tasks. On tasks with poor spatio-temporal work with memory, the cache memory is useless, so each memory access is hundreds of processor cycles, the processor is idle because of this, and therefore the real performance is in units or even a fraction of a percent of the peak. Such tasks are historically called tasks with intensive irregular work with memory – Data intensive tasks (DIS-tasks). The given examples of spatially-temporal work with task memory and real characteristics of equipment operation in such different modes are given in order to illustrate that in practice different types of supercomputers are needed, for example, for CF- and DIS-tasks.},
     year = {2019}
    }
    

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