Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier

Hossein Movahedi-Aliabad; Akram Norouzi; Sepideh Soltanmoradi; Mahshid Nasserian; Manijeh Shahi

doi:doi:10.11648/j.jeee.s.2015030201.25

| Peer-Reviewed

Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier

Hossein Movahedi-Aliabad, Akram Norouzi, Sepideh Soltanmoradi, Mahshid Nasserian, Manijeh Shahi

Published in Journal of Electrical and Electronic Engineering (Volume 3, Issue 2-1)

Received: 16 January 2015 Accepted: 19 January 2015 Published: 8 February 2015

Views: Downloads:

Download PDF

Share This Article

Twitter
Linked In
Facebook

Abstract

In this paper, two useful techniques of Dynamic Threshold Voltage MOSFET (DTMOS) and Positive Feedback Amplifier (PFA) are investigated separately and are applied simultaneously on a Class-AB Amplifier in the 180 nm CMOS technology. In the first proposed technique, Simulation results show that operating voltage can be limited to ±0.5 V in which the voltage gain and bandwidth are 52.6 dB and 103.51 MHz, respectively. In the second proposed technique, the power consumption is reduced more than 50%, the open-loop gain is enhanced 47% and Common Mode Rejection Ratio (CMRR) improves to 86.5 dB. By applying combination of these two techniques for designing the amplifier, CMRR increases to 92.1 dB and the power consumption reduces to 97 µW with the bandwidth of 59.12 MHz.

Published in	Journal of Electrical and Electronic Engineering (Volume 3, Issue 2-1) This article belongs to the Special Issue Research and Practices in Electrical and Electronic Engineering in Developing Countries
DOI	10.11648/j.jeee.s.2015030201.25
Page(s)	66-71
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2024. Published by Science Publishing Group

Keywords

Class-AB Amplifier, DTMOS, FVF, PFA.

References

[1]	P. K. Sinha, A. Vikram and Dr. K. S. Yadav, "Design Of Two Stage CMOS Op-Amp With Low Power And High Slew Rate", International Journal of Engineering Research & Technology, Vol. 1 Issue 8, ISSN: 2278-0181, 2012.
[2]	L. W. Zhong, Zh. Guang, Y. Ya, W. Sihong and C. Pan, "Progress in nanogenerators for portable electronics", Materials today from Elsevier Journals, Vol. 15, No. 12, pp. 532-543, 2012.
[3]	A. Nechibvute, A. Chawanda and P. Luhanga, "Piezoelectric Energy Harvesting Devices: An Alternative Energy Source forWireless Sensors", Hindawi Publishing Corporation, Smart Materials Research, Article ID 853481, 13 pages, DOI :10.1155/2012/853481, 2012.
[4]	H. Sarbishaei, T. K. Toosi, E. Z. Tabasy and R. Lotfi, "A High-Gain High-Speed Low-Power Class-AB Operational Amplifier", 48th IEEE International Midwest Symposium on Circuits and Systems, Vol. 1, pp. 271 - 274 , 2005.
[5]	J. López-Martín, S. Baswa, J. Ramirez-Angulo and R. G. Carvajal, "Low-Voltage Super Class AB CMOS OTA Cells With Very High Slew Rate and Power Efficiency", IEEE Journal Of Solid-State Circuits, Vol. 40, No. 5, pp. 1068-1077, 2005.
[6]	S. Baswa, M. Bikumandla, J. Ramírez-Angulo, A. J. López-Martín, R. G. Carvajal and G. Ducoudray-Acevedo, "Low-Voltage Low-Power Super Class-AB CMOS Op-Amp with Rail-to-Rail Input/Output Swing", 5th IEEE International Caracas Conference on Devices, Circuits and Systems, Vol. 1, pp. 83-86, 2004.
[7]	Lasanen and Kimmo, "Integrated analogue CMOS circuits and structures for heart rate detectors and other low-voltage, low-power applications", University of Oulu, Oulu, Finland, 2011.
[8]	S. Izadpanah-Tous, M. Behroozi and V. Asadpoor, "Design of 0.4 V operational amplifier using low-power techniques", Majlesi Journal of Telecommunication Devices, Vol. 2, No. 1, pp. 145-149, 2012.
[9]	L. Qiang, T. Kuo Hwi Roy, H. Teo Tee and S. Rajinder, "A 1-V 36-μW Low-Noise Adaptive Interface IC for Portable Biomedical Applications", IEEE European Solid-State Device Research Conference, 11-13 September 2007.
[10]	K. Bult and G. Geelen, "A Fast-Settling CMOS Op Amp for SC Circuits with 90-dB DC Gain", IEEE J. Solid-state Circuits, Vol. 25, No. 6, pp. l379-1384, 1990.
[11]	S. Voldman, D. Hui, D. Young, R. Williams, D. Dreps, J. Howard, M. Sherony, P. Assaderaghi and G. Shahidi, "Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry", Electrical Overstress/Electrostatic Discharge Symposium, pp. 29-40, 2000.
[12]	J. Ramirez-Angulo, R. G. Carvajal, A. Torralba, J. Galan, A. P. Vega-Leal and J. Tombs, "The Flipped Voltage Follower: A useful cell for low-voltage low-power circuit design", in Proc. ISCAS 2002, Scottsdale, AZ, pp. II 615-618, 2002.
[13]	M. M. Amourah and R. L. Geiger, "A High Gain Strategy With Positive-Feedback Gain Enhancement Technique", IEEE International Symposium on Circuits and Systems, Vol. 1, pp. 631- 634, 2001.
[14]	E. Kargaran, M. Sawan, Kh. Mafinezhad and H. Nabovati, "Design of 0.4V, 386nW OTA Using DTMOS Technique for Biomedical Applications", 55th IEEE International Midwest Symposium on Circuits and Systems, pp. 270–273, 2012.

Cite This Article

Plain Text BibTeX RIS

APA Style

Hossein Movahedi-Aliabad, Akram Norouzi, Sepideh Soltanmoradi, Mahshid Nasserian, Manijeh Shahi. (2015). Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier. Journal of Electrical and Electronic Engineering, 3(2-1), 66-71. https://doi.org/10.11648/j.jeee.s.2015030201.25

Copy | Download

ACS Style

Hossein Movahedi-Aliabad; Akram Norouzi; Sepideh Soltanmoradi; Mahshid Nasserian; Manijeh Shahi. Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier. J. Electr. Electron. Eng. 2015, 3(2-1), 66-71. doi: 10.11648/j.jeee.s.2015030201.25

Copy | Download

AMA Style

Hossein Movahedi-Aliabad, Akram Norouzi, Sepideh Soltanmoradi, Mahshid Nasserian, Manijeh Shahi. Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier. J Electr Electron Eng. 2015;3(2-1):66-71. doi: 10.11648/j.jeee.s.2015030201.25

Copy | Download

@article{10.11648/j.jeee.s.2015030201.25,
  author = {Hossein Movahedi-Aliabad and Akram Norouzi and Sepideh Soltanmoradi and Mahshid Nasserian and Manijeh Shahi},
  title = {Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier},
  journal = {Journal of Electrical and Electronic Engineering},
  volume = {3},
  number = {2-1},
  pages = {66-71},
  doi = {10.11648/j.jeee.s.2015030201.25},
  url = {https://doi.org/10.11648/j.jeee.s.2015030201.25},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jeee.s.2015030201.25},
  abstract = {In this paper, two useful techniques of Dynamic Threshold Voltage MOSFET (DTMOS) and Positive Feedback Amplifier (PFA) are investigated separately and are applied simultaneously on a Class-AB Amplifier in the 180 nm CMOS technology. In the first proposed technique, Simulation results show that operating voltage can be limited to ±0.5 V in which the voltage gain and bandwidth are 52.6 dB and 103.51 MHz, respectively. In the second proposed technique, the power consumption is reduced more than 50%, the open-loop gain is enhanced 47% and Common Mode Rejection Ratio (CMRR) improves to 86.5 dB. By applying combination of these two techniques for designing the amplifier, CMRR increases to 92.1 dB and the power consumption reduces to 97 µW with the bandwidth of 59.12 MHz.},
 year = {2015}
}

Copy | Download

TY  - JOUR
T1  - Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier
AU  - Hossein Movahedi-Aliabad
AU  - Akram Norouzi
AU  - Sepideh Soltanmoradi
AU  - Mahshid Nasserian
AU  - Manijeh Shahi
Y1  - 2015/02/08
PY  - 2015
N1  - https://doi.org/10.11648/j.jeee.s.2015030201.25
DO  - 10.11648/j.jeee.s.2015030201.25
T2  - Journal of Electrical and Electronic Engineering
JF  - Journal of Electrical and Electronic Engineering
JO  - Journal of Electrical and Electronic Engineering
SP  - 66
EP  - 71
PB  - Science Publishing Group
SN  - 2329-1605
UR  - https://doi.org/10.11648/j.jeee.s.2015030201.25
AB  - In this paper, two useful techniques of Dynamic Threshold Voltage MOSFET (DTMOS) and Positive Feedback Amplifier (PFA) are investigated separately and are applied simultaneously on a Class-AB Amplifier in the 180 nm CMOS technology. In the first proposed technique, Simulation results show that operating voltage can be limited to ±0.5 V in which the voltage gain and bandwidth are 52.6 dB and 103.51 MHz, respectively. In the second proposed technique, the power consumption is reduced more than 50%, the open-loop gain is enhanced 47% and Common Mode Rejection Ratio (CMRR) improves to 86.5 dB. By applying combination of these two techniques for designing the amplifier, CMRR increases to 92.1 dB and the power consumption reduces to 97 µW with the bandwidth of 59.12 MHz.
VL  - 3
IS  - 2-1
ER  -

Copy | Download

Author Information

Hossein Movahedi-Aliabad

Department of Electrical and Electronics, Quchan Technical Institute, Technical and Vocational University, Quchan, Iran
Akram Norouzi

Department of Electrical Engineering, Bojnourd Branch, Islamic Azad University, Bojnourd, Iran
Sepideh Soltanmoradi

Department of Electrical Engineering, Bojnourd Branch, Islamic Azad University, Bojnourd, Iran
Mahshid Nasserian

Department of Electrical Engineering, Ferdowsi University of Mashhad, Mashhad, Iran
Manijeh Shahi

Department of Electrical Engineering, Bojnourd Branch, Islamic Azad University, Bojnourd, Iran

Download PDF

Sections

Plain Text BibTeX RIS

APA Style

Hossein Movahedi-Aliabad, Akram Norouzi, Sepideh Soltanmoradi, Mahshid Nasserian, Manijeh Shahi. (2015). Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier. Journal of Electrical and Electronic Engineering, 3(2-1), 66-71. https://doi.org/10.11648/j.jeee.s.2015030201.25

Copy | Download

ACS Style

Hossein Movahedi-Aliabad; Akram Norouzi; Sepideh Soltanmoradi; Mahshid Nasserian; Manijeh Shahi. Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier. J. Electr. Electron. Eng. 2015, 3(2-1), 66-71. doi: 10.11648/j.jeee.s.2015030201.25

Copy | Download

AMA Style

Hossein Movahedi-Aliabad, Akram Norouzi, Sepideh Soltanmoradi, Mahshid Nasserian, Manijeh Shahi. Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier. J Electr Electron Eng. 2015;3(2-1):66-71. doi: 10.11648/j.jeee.s.2015030201.25

Copy | Download

@article{10.11648/j.jeee.s.2015030201.25,
  author = {Hossein Movahedi-Aliabad and Akram Norouzi and Sepideh Soltanmoradi and Mahshid Nasserian and Manijeh Shahi},
  title = {Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier},
  journal = {Journal of Electrical and Electronic Engineering},
  volume = {3},
  number = {2-1},
  pages = {66-71},
  doi = {10.11648/j.jeee.s.2015030201.25},
  url = {https://doi.org/10.11648/j.jeee.s.2015030201.25},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jeee.s.2015030201.25},
  abstract = {In this paper, two useful techniques of Dynamic Threshold Voltage MOSFET (DTMOS) and Positive Feedback Amplifier (PFA) are investigated separately and are applied simultaneously on a Class-AB Amplifier in the 180 nm CMOS technology. In the first proposed technique, Simulation results show that operating voltage can be limited to ±0.5 V in which the voltage gain and bandwidth are 52.6 dB and 103.51 MHz, respectively. In the second proposed technique, the power consumption is reduced more than 50%, the open-loop gain is enhanced 47% and Common Mode Rejection Ratio (CMRR) improves to 86.5 dB. By applying combination of these two techniques for designing the amplifier, CMRR increases to 92.1 dB and the power consumption reduces to 97 µW with the bandwidth of 59.12 MHz.},
 year = {2015}
}

Copy | Download

TY  - JOUR
T1  - Evaluation of a New Hybrid Technique Based on DTMOS and PFA to Improve Supply Voltage and Power Consumption of a Class-AB Amplifier
AU  - Hossein Movahedi-Aliabad
AU  - Akram Norouzi
AU  - Sepideh Soltanmoradi
AU  - Mahshid Nasserian
AU  - Manijeh Shahi
Y1  - 2015/02/08
PY  - 2015
N1  - https://doi.org/10.11648/j.jeee.s.2015030201.25
DO  - 10.11648/j.jeee.s.2015030201.25
T2  - Journal of Electrical and Electronic Engineering
JF  - Journal of Electrical and Electronic Engineering
JO  - Journal of Electrical and Electronic Engineering
SP  - 66
EP  - 71
PB  - Science Publishing Group
SN  - 2329-1605
UR  - https://doi.org/10.11648/j.jeee.s.2015030201.25
AB  - In this paper, two useful techniques of Dynamic Threshold Voltage MOSFET (DTMOS) and Positive Feedback Amplifier (PFA) are investigated separately and are applied simultaneously on a Class-AB Amplifier in the 180 nm CMOS technology. In the first proposed technique, Simulation results show that operating voltage can be limited to ±0.5 V in which the voltage gain and bandwidth are 52.6 dB and 103.51 MHz, respectively. In the second proposed technique, the power consumption is reduced more than 50%, the open-loop gain is enhanced 47% and Common Mode Rejection Ratio (CMRR) improves to 86.5 dB. By applying combination of these two techniques for designing the amplifier, CMRR increases to 92.1 dB and the power consumption reduces to 97 µW with the bandwidth of 59.12 MHz.
VL  - 3
IS  - 2-1
ER  -

Copy | Download