Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata

Soudip Sinha Roy

doi:doi:10.11648/j.jmpt.20180401.12

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Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata

Soudip Sinha Roy

Received: 17 January 2018 Accepted: 5 February 2018 Published: 28 February 2018

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Abstract

Quantum-dot cellular automata is a molecular logic synthesis technology which is the utmost instance for the shift of microelectronics technology towards the molecular electronics. Nowadays the quantum-dot cellular automata has been playing a major role in the list of the most emerging quantum information computation techniques. Quantum-dot cellular automata is a nanoscale information computational technology which operates through the quantum bits that are temporarily created as a result of electron tunneling in between two qdots. This is an electron configuration based device which utilizes the electrostatic repulsive force to initialize a particular binary logic state based on electronic orientation inside quantum dots. In this paper a few novel methodologies for binary logic gate designing have proposed which are highly optimized in terms of area occupancy and clock latency. Using the proposed universal gates one adjoined half adder-half subtractor, 1 bit comparator and 2 to 1 multiplexer layouts have designed. Moreover, the temperature stability factor for the proposed circuits have also analyzed to reveal the dynamic errors of the circuits during its operation. This temperature stability factor asserts that both of the proposed circuits’ adjoined adder-subtractor and the 1 bit comparator have the same operating range of temperature within 1 K to 6 K. Moreover, the cell wise power dissipation analysis for proposed gates has also performed to specify the input polarization strength limit.

DOI	10.11648/j.jmpt.20180401.12
Published in	Journal of Photonic Materials and Technology (Volume 4, Issue 1, June 2018)
Page(s)	8-14
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2024. Published by Science Publishing Group

Keywords

S-gates, Temperature Stability Factor, Quantum Computing, Quantum Dot Cellular Automata, Power Dissipation

References

[1]	ITRS internation trechnology roadmap for semiconductors 2011 update technical report [online] www.itrs.com
[2]	Soudip Sinha Roy, “Fault Tolerance and Temperature Stability: The Dynamic Error Estimation in Quantum-dot Cellular Automata”, IEEE 3^rd International Symposium on Nanoelectronic and Information Systems (iNIS), in press, doi: 10.1109/iNIS.2017.27, (2017).
[3]	Soudip Sinha Roy, “Generalized Quantum Tunneling Effect and Ultimate Equations for Switching Time and Cell to Cell Power Dissipation Approximation in QCA Devices”, doi: 10.13140/RG.2.2.23039.71849, (self-publication) (2017).
[4]	Soudip Sinha Roy, "Simplification of master power expression and effective power detection of QCA device (Wave nature tunneling of electron in QCA device)," IEEE Students’ Technology Symposium (TechSym), Kharagpur, pp. 272-277. doi: 10.1109/TechSym.2016.7872695, (2016).
[5]	Jason R. Janulis, P. Douglas Tougaw, Steven C. Henderson, and Eric W. Johnson, Serial Bit-Stream Analysis Using Quantum-Dot Cellular Automata, IEEE Transaction on Nanotechnology, vol.3, no. 1, pp. 158-164, March 2004, DOI:10.1109/TNANO.2004.824014
[6]	Gino A. Dilabio, Edmonton (CA); Robert A. WolkoW, Edmonton (CA); Jason L. Pitters, Edmonton (CA); Paul G. Piva, Edmonton (CA), “Atomistic Quantum Dots”, Pub. No. US2015/0060771 A1, 5th May 2015.
[7]	K. Walus, G. Schulhof, G. A. Jullien, R. Zhang, W. Wang, “Circuit Design Based on Majority Gates for Applications with Quantum-Dot Cellular Automata”, IEEE proc. ISSN 0-7803-8622-1, pp. 1354-1357, 2004.
[8]	Soudip Sinha Roy "pGate: An Introduction to A Novel Universal Gate and Power Drop Calculation of QCA circuits" International Journal Of Engineering And Computer Science (IJECS), https://www.ijecs.in, Volume 6 Issue 4, April 2017, 20967-20972, DOI: 10.18535/ijecs/v6i4.31
[9]	C. S. Lent, P. D. Tougaw, W. Porod, G. H. Bernstein, “Quantum cellular automata,” Nanotechnology, vol. 4, pp. 49–57, 1993.
[10]	C. S. Lent, P. D. Tougaw, W. Porod, "Bistable saturation in coupled quantum-dot cells," Journal of Applied Physics, vol. 74, pp. 3558-3566, 1993.
[11]	P. K. Rahi, S. Dewangan, S. Mirania, Md Muzaheru, “Low Power and Area Efficient Design of 1-BitCMOS Comparator Using Different Foundry”, International journal for research in emerging science and technology, vol. 2, no. 5, May 2015.
[12]	Lu, Yuhui & Lent, Craig, “Self-doping of molecular quantum-dot cellular automata: Mixed valence zwitterions”, Physical chemistry chemical physics: PCCP. 13. 14928-36. 10.1039/c1cp21332f.
[13]	Wang, Xingyong & Chen, Shuang & Wen, Jin & Ma, Jing, “Exploring the Possibility of Noncovalently Surface Bound Molecular Quantum-Dot Cellular Automata: Theoretical Simulations of Deposition of Double-Cage Fluorinated Fullerenes on Ag(100) Surface”, The Journal of Physical Chemistry C, 117. 1308−1314. 10.1021/jp306903w.
[14]	Blair, Enrique & S. Lent, Craig, “Environmental decoherence stabilizes quantum-dot cellular automata”, Journal of Applied Physics, 113. DOI: 10.1063/1.4796186.
[15]	Pulimeno, Azzurra & Graziano, Mariagrazia & Wang, Ruiyu & Demarchi, Danilo & Piccinini, Gianluca. “Charge distribution in a molecular QCA wire based on bis-ferrocene molecules”, Proceedings of the 2013 IEEE/ACM International Symposium on Nanoscale Architectures, (NANOARCH) 2013. DOI: 10.1109/NanoArch.2013.6623041.
[16]	Lu, Yuhui & S. Lent, Craig. “Counterion-free molecular quantum-dot cellular automata using mixed valence zwitterions - A double-dot derivative of the [closo-1-CB9H10]- cluster”, Chemical Physics Letters, 582. 86-89. 10.1016/j.cplett.2013.07.019.
[17]	QCADesigner. Accessible online at www.qcadesigner.ca/

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Soudip Sinha Roy. (2018). Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata. Journal of Photonic Materials and Technology, 4(1), 8-14. https://doi.org/10.11648/j.jmpt.20180401.12

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ACS Style

Soudip Sinha Roy. Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata. J. Photonic Mater. Technol. 2018, 4(1), 8-14. doi: 10.11648/j.jmpt.20180401.12

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AMA Style

Soudip Sinha Roy. Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata. J Photonic Mater Technol. 2018;4(1):8-14. doi: 10.11648/j.jmpt.20180401.12

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@article{10.11648/j.jmpt.20180401.12,
  author = {Soudip Sinha Roy},
  title = {Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata},
  journal = {Journal of Photonic Materials and Technology},
  volume = {4},
  number = {1},
  pages = {8-14},
  doi = {10.11648/j.jmpt.20180401.12},
  url = {https://doi.org/10.11648/j.jmpt.20180401.12},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jmpt.20180401.12},
  abstract = {Quantum-dot cellular automata is a molecular logic synthesis technology which is the utmost instance for the shift of microelectronics technology towards the molecular electronics. Nowadays the quantum-dot cellular automata has been playing a major role in the list of the most emerging quantum information computation techniques. Quantum-dot cellular automata is a nanoscale information computational technology which operates through the quantum bits that are temporarily created as a result of electron tunneling in between two qdots. This is an electron configuration based device which utilizes the electrostatic repulsive force to initialize a particular binary logic state based on electronic orientation inside quantum dots. In this paper a few novel methodologies for binary logic gate designing have proposed which are highly optimized in terms of area occupancy and clock latency. Using the proposed universal gates one adjoined half adder-half subtractor, 1 bit comparator and 2 to 1 multiplexer layouts have designed. Moreover, the temperature stability factor for the proposed circuits have also analyzed to reveal the dynamic errors of the circuits during its operation. This temperature stability factor asserts that both of the proposed circuits’ adjoined adder-subtractor and the 1 bit comparator have the same operating range of temperature within 1 K to 6 K. Moreover, the cell wise power dissipation analysis for proposed gates has also performed to specify the input polarization strength limit.},
 year = {2018}
}

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TY  - JOUR
T1  - Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata
AU  - Soudip Sinha Roy
Y1  - 2018/02/28
PY  - 2018
N1  - https://doi.org/10.11648/j.jmpt.20180401.12
DO  - 10.11648/j.jmpt.20180401.12
T2  - Journal of Photonic Materials and Technology
JF  - Journal of Photonic Materials and Technology
JO  - Journal of Photonic Materials and Technology
SP  - 8
EP  - 14
PB  - Science Publishing Group
SN  - 2469-8431
UR  - https://doi.org/10.11648/j.jmpt.20180401.12
AB  - Quantum-dot cellular automata is a molecular logic synthesis technology which is the utmost instance for the shift of microelectronics technology towards the molecular electronics. Nowadays the quantum-dot cellular automata has been playing a major role in the list of the most emerging quantum information computation techniques. Quantum-dot cellular automata is a nanoscale information computational technology which operates through the quantum bits that are temporarily created as a result of electron tunneling in between two qdots. This is an electron configuration based device which utilizes the electrostatic repulsive force to initialize a particular binary logic state based on electronic orientation inside quantum dots. In this paper a few novel methodologies for binary logic gate designing have proposed which are highly optimized in terms of area occupancy and clock latency. Using the proposed universal gates one adjoined half adder-half subtractor, 1 bit comparator and 2 to 1 multiplexer layouts have designed. Moreover, the temperature stability factor for the proposed circuits have also analyzed to reveal the dynamic errors of the circuits during its operation. This temperature stability factor asserts that both of the proposed circuits’ adjoined adder-subtractor and the 1 bit comparator have the same operating range of temperature within 1 K to 6 K. Moreover, the cell wise power dissipation analysis for proposed gates has also performed to specify the input polarization strength limit.
VL  - 4
IS  - 1
ER  -

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Author Information

Soudip Sinha Roy

Department of Nanotechnology, Amity University, Noida, India

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APA Style

Soudip Sinha Roy. (2018). Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata. Journal of Photonic Materials and Technology, 4(1), 8-14. https://doi.org/10.11648/j.jmpt.20180401.12

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ACS Style

Soudip Sinha Roy. Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata. J. Photonic Mater. Technol. 2018, 4(1), 8-14. doi: 10.11648/j.jmpt.20180401.12

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AMA Style

Soudip Sinha Roy. Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata. J Photonic Mater Technol. 2018;4(1):8-14. doi: 10.11648/j.jmpt.20180401.12

Copy | Download

@article{10.11648/j.jmpt.20180401.12,
  author = {Soudip Sinha Roy},
  title = {Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata},
  journal = {Journal of Photonic Materials and Technology},
  volume = {4},
  number = {1},
  pages = {8-14},
  doi = {10.11648/j.jmpt.20180401.12},
  url = {https://doi.org/10.11648/j.jmpt.20180401.12},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jmpt.20180401.12},
  abstract = {Quantum-dot cellular automata is a molecular logic synthesis technology which is the utmost instance for the shift of microelectronics technology towards the molecular electronics. Nowadays the quantum-dot cellular automata has been playing a major role in the list of the most emerging quantum information computation techniques. Quantum-dot cellular automata is a nanoscale information computational technology which operates through the quantum bits that are temporarily created as a result of electron tunneling in between two qdots. This is an electron configuration based device which utilizes the electrostatic repulsive force to initialize a particular binary logic state based on electronic orientation inside quantum dots. In this paper a few novel methodologies for binary logic gate designing have proposed which are highly optimized in terms of area occupancy and clock latency. Using the proposed universal gates one adjoined half adder-half subtractor, 1 bit comparator and 2 to 1 multiplexer layouts have designed. Moreover, the temperature stability factor for the proposed circuits have also analyzed to reveal the dynamic errors of the circuits during its operation. This temperature stability factor asserts that both of the proposed circuits’ adjoined adder-subtractor and the 1 bit comparator have the same operating range of temperature within 1 K to 6 K. Moreover, the cell wise power dissipation analysis for proposed gates has also performed to specify the input polarization strength limit.},
 year = {2018}
}

Copy | Download

TY  - JOUR
T1  - Implementation of Novel Binary Logic Gates with Temperature Stability Factor Analysis in Quantum-dot Cellular Automata
AU  - Soudip Sinha Roy
Y1  - 2018/02/28
PY  - 2018
N1  - https://doi.org/10.11648/j.jmpt.20180401.12
DO  - 10.11648/j.jmpt.20180401.12
T2  - Journal of Photonic Materials and Technology
JF  - Journal of Photonic Materials and Technology
JO  - Journal of Photonic Materials and Technology
SP  - 8
EP  - 14
PB  - Science Publishing Group
SN  - 2469-8431
UR  - https://doi.org/10.11648/j.jmpt.20180401.12
AB  - Quantum-dot cellular automata is a molecular logic synthesis technology which is the utmost instance for the shift of microelectronics technology towards the molecular electronics. Nowadays the quantum-dot cellular automata has been playing a major role in the list of the most emerging quantum information computation techniques. Quantum-dot cellular automata is a nanoscale information computational technology which operates through the quantum bits that are temporarily created as a result of electron tunneling in between two qdots. This is an electron configuration based device which utilizes the electrostatic repulsive force to initialize a particular binary logic state based on electronic orientation inside quantum dots. In this paper a few novel methodologies for binary logic gate designing have proposed which are highly optimized in terms of area occupancy and clock latency. Using the proposed universal gates one adjoined half adder-half subtractor, 1 bit comparator and 2 to 1 multiplexer layouts have designed. Moreover, the temperature stability factor for the proposed circuits have also analyzed to reveal the dynamic errors of the circuits during its operation. This temperature stability factor asserts that both of the proposed circuits’ adjoined adder-subtractor and the 1 bit comparator have the same operating range of temperature within 1 K to 6 K. Moreover, the cell wise power dissipation analysis for proposed gates has also performed to specify the input polarization strength limit.
VL  - 4
IS  - 1
ER  -

Copy | Download