Pixel-based Character Image Compression for Data Transfer from ARM Controller to FPGA System
American Journal of Electrical and Computer Engineering
Volume 3, Issue 2, December 2019, Pages: 58-66
Received: Feb. 4, 2020;
Accepted: Feb. 20, 2020;
Published: Mar. 2, 2020
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Thanh-Hai Nguyen, Department of Industrial Electronic - Biomedical Engineering, HCMC University of Technology and Education, HCM City, Vietnam
Ba-Viet Ngo, Department of Industrial Electronic - Biomedical Engineering, HCMC University of Technology and Education, HCM City, Vietnam
Thanh-Tam Nguyen, Department of Biomedical Engineering, International University-Vietnam National University, HCM City, Vietnam
Duc-Dung Vo, Department of Industrial Electronic - Biomedical Engineering, HCMC University of Technology and Education, HCM City, Vietnam
Truong-Duy Nguyen, Department of Industrial Electronic - Biomedical Engineering, HCMC University of Technology and Education, HCM City, Vietnam
This paper proposes a pixel-based compression algorithm for character digital image in improving the storage of characters in memory during system operation. In particular, in this algorithm, each character binary image in text is grouped by binary numbers and then encoded to reduce the character image capacity of the character compared to the original character. In addition, a novel point in this algorithm is that one character image type is differently grouped binary numbers for compressing. Therefore, the compressed character image is stored in a memory using an ARM microcontroller system and transferred to an FPGA module for decoding before printing. Moreover, the compression ratio of each character is high or low depending on the font type of image characters. Therefore, the high compression ratio using this compression algorithm will allow saving memory space in the memory system. Simulation results show to illustrate the effectiveness of the proposed algorithm and also this compression algorithm was implemented to texts with characters for encoder data transfer from an ARM microcontroller into an FPGA system for effectively printing the text/logo/barcode/QR code/expired date on products with high speed after decoding. Moreover, this compression algorithm can be developed to apply to many different font types and sizes, as well as be utilized different microcontrollers/Microprocessors connected to FPGA systems for processing with high speed. It means that one industrial system using this algorithm can obtain very high performance related to processing digital image characters.
Pixel-based Character Image Compression for Data Transfer from ARM Controller to FPGA System, American Journal of Electrical and Computer Engineering.
Vol. 3, No. 2,
2019, pp. 58-66.
Aurelle Tchagna Kouanou, Daniel Tchiotsop, Theophile Fonzin Fozin, Bayangmbe Mounmo, René Tchinda, "Real-Time Image Compression System Using an Embedded Board," Science Journal of Circuits, Systems and Signal Processing, vol. 7, no. 4, pp. 81-86, 2018.
Ikerionwu Charles, Isonkobong Christopher Udousoro, “The Application of Selective Image Compression Techniques,” Software Engineering, vol. 6, no. 4, pp. 116-120, 2018.
Ruchita K. Ingole, “Embedded Image Compression: A Review,” International Journal of Data Science and Analysis, vol. 3, no. 1, pp. 1-4, 2017.
Syed Muhammad Arsalan Bashir, "Font Acknowledgment and Character Extraction of Digital and Scanned Images," International Journal of Computer Applications, vol. 70, no. 8, pp. 1-10, 2013.
Jahanzeb Ahmad, Mansoor Ebrahim, "FPGA based implementation of Baseline JPEG decoder," International Journal of Electrical & Computer Sciences IJECS, vol. 9, no. 9, pp. 371-377, 2009.
Yeli Li, Likun Lu, Binbin Yan, "The design and implementation of high-speed data interface based on Ink-jet printing system," in Proceedings of the 2015 International Symposium on Computers & Informatics, pp. 1725- 1732, 2015.
M. Akil, L. Perroton, T. Grandpierre, "FPGA-based architecture for hardware compression/decompression of wide format images," Journal of Real-Time Image Processing, vol. 1, pp. 163-170, 2006.
S. Banerjee and A. Kuchibhotla, "Real-time optimal-memory image rotation for embedded systems," 16th IEEE International Conference on Image Processing (ICIP), pp. 3277-3280, 2009.
Samrin Shaikh, Shashank Pujari, "Migration from microcontroller to FPGA based SoPC design: Case study: LMS adaptive filter design on Xilinx Zynq FPGA with embedded ARM controller," International Conference on Automatic Control and Dynamic Optimization Techniques (ICACDOT), pp. 129-134, 2016.
Paulo Garcia, Deepayan Bhowmik, Robert Stewart, Greg Michaelson and Andrew Wallace, "Optimized Memory Allocation and Power Minimization for FPGA-Based Image Processing," Journal of Imaging, vol. 5, no. 7, pp. 27-49, 2019.
I. Shcherbakov, C. Weis, and N. Wehn, "A high-performance FPGA-based implementation of the LZSS compression algorithm," in Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), IEEE 26th International, pp. 449-453, 2012.
J. Fowers, J.-Y. Kim, D. Burger, and S. Hauck, "A scalable high-bandwidth architecture for lossless compression on FPGAs," in Field-Programmable Custom Computing Machines (FCCM), IEEE 23rd Annual International Symposium on, pp. 52-59, 2015.
X. Zhou, Y. Ito, and K. Nakano, "An efficient implementation of LZW decompression in the FPGA," in Parallel and Distributed Processing Symposium Workshops, IEEE International, pp. 599-607, 2016.
T. Mitra and T.-c. Chiueh, "An FPGA implementation of triangle mesh decompression," Proceedings 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, Napa, CA, USA, pp. 22-31, 2002.
M. P. Sarkar, P. Indurkar, and R. Kadam, "An optimum algorithm for data compression using VHDL," Int. Res. J. Eng. Technol, vol. 2, pp. 572-576, 2015.
P. M. Sandeep and C. S. Manikandababu, "Compression and decompression of FPGA bitstreams," International Conference on Computer Communication and Informatics, Coimbatore, pp. 1-4, 2013.
P. Hemnath and V. Prabhu, "Compression of FPGA bitstreams using improved RLE algorithm," in Information Communication and Embedded Systems (ICICES), International Conference on, pp. 834-839, 2013.
Z. Li and S. Hauck, "Configuration compression for virtex FPGAs," in Field-Programmable Custom Computing Machines, The 9th Annual IEEE Symposium on, pp. 147-159, 2001.
S. Rigler, "FPGA-Based Lossless Data Compression Using GNU Zip," University of Waterloo, 2007.
I. Suarjaya, "A new algorithm for data compression optimization," International Journal of Advanced Computer Science and Applications, vol. 3, no. 8, pp. 14-17, 2012.
M. Azad, A. Kalam, R. Sharmeen, S. Ahmad, and S. Kamruzzaman, "An efficient technique for text compression," The 1st International Conference on Information Management and Business (IMB2005), pp. 467-473, 2010.
R. Gallager, "Variations on a theme by Huffman," IEEE Transactions on Information Theory, vol. 24, no. 6, pp. 668-674, 1978.
N. Faller, "An adaptive system for data compression," in Record of the 7th Asilomar Conference on Circuits, Systems and Computers, pp. 593-597, 1973.
D. E. Knuth, "Dynamic huffman coding," Journal of algorithms, vol. 6, no. 2, pp. 163-180, 1985.
J. S. Vitter, "Design and analysis of dynamic Huffman codes," Journal of the ACM (JACM), vol. 34, no. 4, pp. 825-845, 1987.
N. Ganvir, A. Jadhav, and P. Scoe, "Explore the Performance of the ARM Processor Using JPEG," International Journal on Computer Science and Engineering, vol. 2, no. 1, pp. 12-17, 2010.
C. Lefurgy, P. Bird, I.-C. Chen, and T. Mudge, "Improving code density using compression techniques," in Proceedings of the 30th Annual international symposium on Microarchitecture ACM/IEEE, pp. 194-203, 1997.