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Design of DDS Multi-waveform Generator Based on CPLD

Received: 16 August 2021    Accepted: 30 August 2021    Published: 7 September 2021
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Abstract

Traditional Direct Digital Synthesis (DDS) waveform generators were usually completed by DDS chips, which were expensive and poorly customizable. This paper proposed a CPLD-based DDS multi-waveform generator design. DDS was independently developed and programmed by VHDL language. The system could be interfaced with PC. The system was mainly divided into two parts: upper computer and lower computer. The upper computer part mainly included the main interface design of the system, the sending of control commands and the receiving part of data. The sending and receiving of commands and data was realized by serial communication. The upper computer part was programmed by High-level programming language named DELPHI. The lower computer part mainly included DDS design part, the reception of control commands and the transmission of data, etc., the lower computer part mainly adopt VHDL language to be programmed in CPLD. The DDS design part mainly included the design of the phase accumulator, the design of the ROM, the design of the D/A part, and the design of the low-pass filter. The system could adjust the frequency of the output waveform by adjusting the size of the frequency word, and adjust the waveform shape of the system output by adjusting the internal data of the ROM. Simulation and experimental results showed that: the DDS multi-waveform generator designed by CPLD could achieve the expected goal, and the work effect was good.

Published in Software Engineering (Volume 9, Issue 3)
DOI 10.11648/j.se.20210903.13
Page(s) 65-69
Creative Commons

This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.

Copyright

Copyright © The Author(s), 2024. Published by Science Publishing Group

Keywords

Waveform Generator, DDS, VHDL, System

References
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[2] Li Mengting, Li Huafeng. Design of SPWM Wave drive circuit based on DDS [J]. Foreign electronic measurement technology, 2020, 39 (6): 1-4.
[3] Li Pengbo. The design of high rate arbitrary signal generator based on DDS [D]. BEI JING JIAOTONG UNIVERSITY, 2019.
[4] Wang Ren. Design and Realization on the Frequency Synthesizer Based on DDS [D]. Xidian University, 2017.
[5] LIU Ya-di. DEVELOPMENT OF SYNCHRONOUS TIMING GENERATOR BASED ON DDS [D]. Southeast University, 2019.
[6] Miao Zhonghua, Li Hui, Gao Jian, etc. Incremental PID Closed-loop Control Algorithm Based on DDS is Implemented in FPGA [J]. Industrial control computer, 2017, 30 (8): 35-36.
[7] XIAO YIHAN. Design and Implementation of Controlled Signal Generator using FPGA based on DDS technology [D]. Hunan University, 2008.
[8] Shen Hui, Xue Bing, Tang Chaoyang, etc. Design of signal generator based on DDS technology [J]. ELECTRONIC MEASUREMENT TECHNOLOGY, 2020, 43 (20): 160-164.
[9] HAN Shuo, JIA Dan-ping, ZHANG Tao, et al. Power Supply Design for Piezoelectric Driving Device based on DDS Signal Generation Principle [J]. Communications Technology, 2020, 53 (4): 1024-1031.
[10] Zheng Jianfeng, Bai Bichao, Zhang Han. Multi-channel drive system of phased array based on DDS chips [J]. Applied Acoustics, 2021, 182.
[11] FAN Zhiyong, ZHANG Tong, LIU Tao. Research on Configuration Monitoring Technology of Aircraft Electromechanical System Based on DDS [J]. Computer Measurement & Control, 2021, 29 (8): 104-108+113.
[12] WANG Zhicheng, PANG Yu, LIN Jinzhao, et al. A Design of Household Ultrasonic Therapeutic Apparatus Based on DDS [J]. PIEZOELECTRICS & ACOUSTOOPTICS, 2021, 43 (2): 170-173.
[13] TONG Chen-jie, PING Yi, HAN Ming-ming, et al. Research on the Fast Detection Device of the XMACII based on DDS [J]. Equipment operation and maintenance, 2021, 3: 142-143.
[14] LI Guang-yong. Design of PLC Variable Frequency Pulse Output Controller Based on DDS [J]. Automation technology and Application, 2021, 40 (7): 70-71+120.
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[16] ZHANG Qiang, CUI Yongjun. Design of frequency characteristic tester based on FPGA and DDS [J]. Electronic Design Engineering, 2021, 29 (7): 129-133.
Cite This Article
  • APA Style

    Li Hui, Li Jing, Li Ruofan, Wang Dongkun. (2021). Design of DDS Multi-waveform Generator Based on CPLD. Software Engineering, 9(3), 65-69. https://doi.org/10.11648/j.se.20210903.13

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    ACS Style

    Li Hui; Li Jing; Li Ruofan; Wang Dongkun. Design of DDS Multi-waveform Generator Based on CPLD. Softw. Eng. 2021, 9(3), 65-69. doi: 10.11648/j.se.20210903.13

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    AMA Style

    Li Hui, Li Jing, Li Ruofan, Wang Dongkun. Design of DDS Multi-waveform Generator Based on CPLD. Softw Eng. 2021;9(3):65-69. doi: 10.11648/j.se.20210903.13

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  • @article{10.11648/j.se.20210903.13,
      author = {Li Hui and Li Jing and Li Ruofan and Wang Dongkun},
      title = {Design of DDS Multi-waveform Generator Based on CPLD},
      journal = {Software Engineering},
      volume = {9},
      number = {3},
      pages = {65-69},
      doi = {10.11648/j.se.20210903.13},
      url = {https://doi.org/10.11648/j.se.20210903.13},
      eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.se.20210903.13},
      abstract = {Traditional Direct Digital Synthesis (DDS) waveform generators were usually completed by DDS chips, which were expensive and poorly customizable. This paper proposed a CPLD-based DDS multi-waveform generator design. DDS was independently developed and programmed by VHDL language. The system could be interfaced with PC. The system was mainly divided into two parts: upper computer and lower computer. The upper computer part mainly included the main interface design of the system, the sending of control commands and the receiving part of data. The sending and receiving of commands and data was realized by serial communication. The upper computer part was programmed by High-level programming language named DELPHI. The lower computer part mainly included DDS design part, the reception of control commands and the transmission of data, etc., the lower computer part mainly adopt VHDL language to be programmed in CPLD. The DDS design part mainly included the design of the phase accumulator, the design of the ROM, the design of the D/A part, and the design of the low-pass filter. The system could adjust the frequency of the output waveform by adjusting the size of the frequency word, and adjust the waveform shape of the system output by adjusting the internal data of the ROM. Simulation and experimental results showed that: the DDS multi-waveform generator designed by CPLD could achieve the expected goal, and the work effect was good.},
     year = {2021}
    }
    

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  • TY  - JOUR
    T1  - Design of DDS Multi-waveform Generator Based on CPLD
    AU  - Li Hui
    AU  - Li Jing
    AU  - Li Ruofan
    AU  - Wang Dongkun
    Y1  - 2021/09/07
    PY  - 2021
    N1  - https://doi.org/10.11648/j.se.20210903.13
    DO  - 10.11648/j.se.20210903.13
    T2  - Software Engineering
    JF  - Software Engineering
    JO  - Software Engineering
    SP  - 65
    EP  - 69
    PB  - Science Publishing Group
    SN  - 2376-8037
    UR  - https://doi.org/10.11648/j.se.20210903.13
    AB  - Traditional Direct Digital Synthesis (DDS) waveform generators were usually completed by DDS chips, which were expensive and poorly customizable. This paper proposed a CPLD-based DDS multi-waveform generator design. DDS was independently developed and programmed by VHDL language. The system could be interfaced with PC. The system was mainly divided into two parts: upper computer and lower computer. The upper computer part mainly included the main interface design of the system, the sending of control commands and the receiving part of data. The sending and receiving of commands and data was realized by serial communication. The upper computer part was programmed by High-level programming language named DELPHI. The lower computer part mainly included DDS design part, the reception of control commands and the transmission of data, etc., the lower computer part mainly adopt VHDL language to be programmed in CPLD. The DDS design part mainly included the design of the phase accumulator, the design of the ROM, the design of the D/A part, and the design of the low-pass filter. The system could adjust the frequency of the output waveform by adjusting the size of the frequency word, and adjust the waveform shape of the system output by adjusting the internal data of the ROM. Simulation and experimental results showed that: the DDS multi-waveform generator designed by CPLD could achieve the expected goal, and the work effect was good.
    VL  - 9
    IS  - 3
    ER  - 

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Author Information
  • Faculty of Automation, Huaiyin Institute of Technology, Huaian, China

  • Faculty of Automation, Huaiyin Institute of Technology, Huaian, China

  • Faculty of Automation, Huaiyin Institute of Technology, Huaian, China

  • Faculty of Automation, Huaiyin Institute of Technology, Huaian, China

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